When forming a fin field effect transistor (fin-FET), contact plugs can be formed on the source, drain and/or gate of the transistor. The contact plugs may connect the source, drain, and/or the gate with peripheral metal wiring layer.
FIG. 1 depicts a conventional method for forming a contact plug of a fin field effect transistor. As shown in FIG. 1, a fin 101, a gate 102 across the fin 101, sidewall spacers 103 across the fin 101 and on both sides of the gate 102, a source 111 on one side of the fin 101 and a drain 121 on the other side of the fin 101.
In FIG. 2, an interlayer dielectric layer 104 is formed to cover the semiconductor substrate 100 and the fin 101. The interlayer dielectric layer 104 has a top surface leveled with the gate 102. As shown in FIGS. 2-3, a portion of the interlayer dielectric layer 121 on the source 111 and the drain 121 is removed to form a groove 105 to expose the source 111 and to form a groove 106 to expose the drain 121.
In FIGS. 3-4, tungsten is filled in the trench 105 and the trench 106 to form a contact plug 107 across the fin 101 and on the source 111 and to form a contact plug 108 across the fin 101 and on the drain 121.
However, contact plugs formed by conventional technologies may not provide desired device performance of the resultant semiconductor device. It is therefore desirable to provide a semiconductor device and a method for forming the semiconductor device with improved device performance.